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By L. F. Lind, J. C. C. Nelson (auth.)

ISBN-10: 0333192672

ISBN-13: 9780333192672

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Extra resources for Analysis and Design of Sequential Digital Systems

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More will be said about these transient pulses in chapter 4. When the output of a logic gate switches from one logic level to the other, there is usually a sudden change in the power-supply current to the gate. This transient, if not controlled, can induce false inputs into other gates for a briefperiod oftime. The popular solution to this problem is to provide many power-supply-decoupling capacitors throughout the circuit. These capacitors may be thought of as small batteries that are able to supply sudden, limited current pulses without much voltage variation.

More generally, the contents of the register may be progressively replaced by an arithmetic function of the previous contents of the register and a number stored in another register. Very widely used in the early days of digital computing, this technique is becoming of less importance as digital processors become more and more parallel in operation due to the availability of relatively low-priced mediumand large-scale parallel integrated arithmetic processors. It is evident from several ofthe applications that an ability to load data into the register, before any shifting operations, is important.

The disadvantage of the procedure is that more gates are usually required. The use of common map factors to reduce the number of gates is best illustrated through some examples. 28 Example oJmultiple-output simplijication. the two outputs Zl and Z2 is shown. It is seen that both Zl and Z2 require the prime implicant X2X3' This factor can therefore be used in the formation of Zl =X2X3+X1X3 and Z2 =X2X3+X1X2, which will reduce thegate count. 29. 29 Counter-example oJmultiple-output simplijication.

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